Not Applicable
Not Applicable
1. Field of the Invention
This invention relates to high density, high speed signal interconnections between circuit components in a digital system. More particularly, the invention concerns a high density connection interface for multiple high speed digital signal transmission lines that produces reduced cross talk between the adjacent signalling channels. Still more particularly, the invention is directed to the reduction of cross talk in high density signal interconnects made through back plane connectors with sub nano-second logic signal edge speeds.
2. Description of the Prior Art
In high speed digital signalling environments, wherein each signal is considered to be effectively transported on two electrically conductive elements (hereinafter referred to as xe2x80x9cwire pairsxe2x80x9d), interconnections between transmission media, such as the pin connections between back plane circuit boards and plug-in circuit cards, may produce significant cross talk between signal carrying pin pairs that are adjacent to one another. The traditional method of reducing connector cross-talk is to assign isolating (e.g., grounded) pins between each of the signal pin pairs. This dramatically reduces the number of pin pairs available for signals and limits interconnection density. Connectors with plural grounded conductive shields between the rows and columns of pin pairs are also available, but these are costly. Other cross-talk reduction methods involve increasing the rise time of the logic signals to reduce the degree of cross talk.
Although there are prior art digital communications systems wherein adjacent connector pin pairs are grouped on the basis of signal direction, and wherein impedance matching may be applied at the receiver end of each signal path to minimize reflections, such systems do not account for the directional nature of crosstalk from adjacent connector pins and therefore do not effectively compensate for it. A digital signal connection interface that effectively counteracts directional crosstalk interference would be desirable.
A high speed connection interface with driver end and receiver end impedance matching facilitates bi-directional digital signal communications with reduced cross talk between communicating digital signal processing units. In accordance with a preferred embodiment of the invention, a multiple pin connector includes disconnectable header and receptacle portions. The header is attached to a First set of signal carrying wire pairs communicating with a first signal processing unit. The receptacle is attached to a second set of signal carrying wire pairs communicating with a second signal processing unit. Within each of the first and second wire pair sets is a first wire pair subset carrying digital signals travelling in a first direction between the signal processing units, and a second wire pair subset carrying digital signals travelling in a second direction between the signal processing units, which is opposite to the first direction. The first and second wire pair sets are attached to the connector such that adjacent pin pairs of the connector carry only signals travelling in the same direction and such that connector pin pairs carrying signals travelling in opposite directions are not adjacent to each other. An impedance matching circuit is provided for each signal-carrying wire pair of the first and second wire pair sets. Each impedance matching circuit has a first side connected to one of the signal processing units and a second side connected to one of the wire pairs at an impedance that substantially matches the wire pair impedance. The impedance matching circuits that connect to wire pairs carrying outgoing signals from a signal processing unit provide driver end impedance matching. The impedance matching circuits that connect to wire pairs carrying incoming signals to a signal processing unit provide receiver end impedance matching.